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Temporal and Spatial Locality

When referencing data items, the closer the instruction is to the processor the faster it can be accessed. The principle of locality is broken down into two types, temporal locality and spatial locality. Temporal locality can be explained as something that has been referenced has a high probability of being quickly referenced again (Patterson & Hennessy, 2014). While spatial locality is when instruction is referenced, instructions with addresses close to it will referenced as well (Patterson & Hennessy, 2014).  

When incorporating these two concepts with referencing data, it can be explained using an array. Chi, Ho, and Lau (2012) explain that “array references have relatively strong spatial locality”. When indexing through the elements of an array is spatial locality. Elements in array hold memory addresses close to each other. Temporal locality would be constantly referencing the same element in an array. 

The memory hierarchy can be broken into layers of different types of memory. The top layer is the one closest to the processor and is going to have the quickest access times. An example would be registers. The next layer would be cache, which can hold more data than a register, but the access speed is not going to be as quick. An example of the next layer would be a computer’s RAM, and after that layer a computer’s HHD or SSD would be next. As you move from the top layer to the bottom, the access speed reduces but the amount of available storage increases. 

When taking memory behavior into consideration, there are two aspects that are important, coherence and consistency. Coherence “defines what values can be returned by a read” while consistency “determines when a written value will be returned by a read” (Patterson & Hennessy, 2014). Writing a program can be a complex problem. Ensuring it is reading and writing the correct instructions is crucial to a program functioning correctly.  


References 

Chi, C., Ho, C., & Lau, S. (2001, August 06). Reducing memory latency using a small software driven array cache. Retrieved November 29, 2021 from https://eds-s-ebscohost-com.proxy-library.ashford.edu/eds/detail/detail?vid=6&sid=b09acd0e-f245-4767-8e14-82114b8d0304%40redis&bdata=JnNpdGU9ZWRzLWxpdmUmc2NvcGU9c2l0ZQ%3d%3d#AN=edseee.375393&db=edseee

Patterson, D. A., & Hennessy, J. L. (2014). Computer organization and design: The hardware/software interface (5th ed.). Retrieved from https://zybooks.zyante.com



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